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foss-fpga-tools
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verible
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fd02cb426a323faa6c68f3237de8b44620407cb3
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.
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verilog
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tools
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lint
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testdata
/
generate_label_module.sv
blob: e9b30ae14c610c9a20c3b96364ebbdfbdc9d6f89 [
file
]
module
generate_label_module
;
generate
if
(
foo
)
begin
baz bam
;
end
endgenerate
endmodule