doc: Reference default timing constraints in vpr --sdc_file description

doc/src/vpr/command_line_usage.rst

diff --git a/doc/src/vpr/command_line_usage.rst b/doc/src/vpr/command_line_usage.rst
index da35e32..958b292 100644
--- a/doc/src/vpr/command_line_usage.rst
+++ b/doc/src/vpr/command_line_usage.rst
@@ -203,7 +203,7 @@
 
 .. option:: --circuit_file <file>
 
-    Path to technology mapped user circuit in blif format.
+    Path to technology mapped user circuit in BLIF format.
 
     .. note:: If specified the ``circuit`` positional argument is treated as the circuit name.
 
@@ -233,7 +233,9 @@
 
 .. option:: --sdc_file <file>
 
-    Path to SDC timing constraints file
+    Path to SDC timing constraints file.
+
+    If no SDC file is specified :ref:`default timing constraints <default_timing_constraints>` will be used.
 
 .. option:: --write_rr_graph <file>