Sign in
foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
0a8dcf10219ceecb9d0b3e304cd0e987faea9c17
/
.
/
vtr_flow
/
benchmarks
/
microbenchmarks
/
always_true.blif
blob: 23917ce5b19bf0fe45728808ab053fd2f28b09a8 [
file
] [
log
] [
blame
]
.
model always_true
.
inputs i0 i1 i2 i3 i4 i5
.
outputs o
.
names i0 i1 i2 i3 i4 i5 o
------
1
.
end