vtr_flow/benchmarks/blif/3/s208.1.blif

.model top
.inputs pp_0 pclk pc_8 pc_7 pc_6 pc_5 pc_4 pc_3 pc_2 pc_1 pc_0
.outputs pz
.latch    ni111 n_n40 re pclk 2
.latch    ni112 n_n90 re pclk 2
.latch    ni113 n_n91 re pclk 2
.latch    ni13 n_n87 re pclk 2
.latch    ni14 n_n88 re pclk 2
.latch    ni15 n_n89 re pclk 2
.latch    ni110 n_n39 re pclk 2
.latch    ni12 n_n38 re pclk 2
.names n_n74 [19] pz
1- 1
-1 1
.names n_n40 n_n90 [24] ni111
10- 1
1-1 1
010 1
.names n_n90 [24] ni112
11 1
00 1
.names n_n91 [20] [177] ni113
11- 1
1-0 1
001 1
.names n_n87 [20] ni13
11 1
00 1
.names pp_0 n_n88 n_n89 ni14
01- 1
-10 1
101 1
.names pp_0 n_n89 ni15
01 1
10 1
.names n_n39 [31] ni110
11 1
00 1
.names n_n87 n_n38 [20] ni12
01- 1
-11 1
100 1
.names [40] [41] [181] n_n74
1-1 1
-11 1
.names pp_0 n_n88 n_n89 [20]
0-- 1
-0- 1
--0 1
.names n_n91 [20] [177] [24]
0-- 1
-1- 1
--0 1
.names n_n40 n_n90 [24] [31]
0-- 1
-0- 1
--1 1
.names pp_0 [23] [187] [19]
11- 1
1-1 1
.names n_n89 [36] [37] [23]
01- 1
0-1 1
.names n_n88 [38] [39] [36]
01- 1
0-1 1
.names pc_2 n_n88 [37]
11 1
.names [183] [184] [185] [38]
111 1
.names pc_3 n_n87 [39]
11 1
.names n_n38 [42] [43] [40]
01- 1
0-1 1
.names pc_4 n_n38 [41]
11 1
.names n_n91 [44] [45] [42]
01- 1
0-1 1
.names pc_5 n_n91 [43]
11 1
.names pc_7 n_n40 n_n90 [44]
110 1
.names pc_6 n_n90 [45]
11 1
.names n_n38 n_n87 [177]
11 1
.names n_n87 pp_0 [179]
01 1
.names n_n88 n_n89 [179] [181]
001 1
.names n_n91 n_n90 [183]
00 1
.names n_n39 n_n87 [184]
10 1
.names pc_8 n_n40 n_n38 [185]
100 1
.names pc_1 pc_0 n_n89 [187]
-1- 1
1-1 1
.end