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foss-fpga-tools
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third_party
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vtr-verilog-to-routing
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25e5df9bac99258a495799fdfff7c8646946b93b
/
.
/
vtr_flow
/
scripts
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spice
/
subckt
/
mux3.sp
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*
3
input mux
*.
subckt nfet drain gate source size
=
1
.
subckt mux3 in0 in1 in2
out
sel0 sel1 sel2 size
=
1
X0 in0 sel0
out
0
nfet size
=
'size'
X1 in1 sel1
out
0
nfet size
=
'size'
X2 in2 sel2
out
0
nfet size
=
'size'
.
ends
