vtr_flow/benchmarks/blif/2/s208.1.blif

.model top
.inputs pp_0 pclk pc_8 pc_7 pc_6 pc_5 pc_4 pc_3 pc_2 pc_1 pc_0
.outputs pz
.latch    ni111 n_n40 re pclk 2
.latch    ni112 n_n90 re pclk 2
.latch    ni113 n_n91 re pclk 2
.latch    ni13 n_n87 re pclk 2
.latch    ni14 n_n88 re pclk 2
.latch    ni15 n_n89 re pclk 2
.latch    ni110 n_n39 re pclk 2
.latch    ni12 n_n38 re pclk 2
.names n_n74 [19] pz
1- 1
-1 1
.names n_n40 [21] ni111
11 1
00 1
.names n_n90 [24] ni112
11 1
00 1
.names n_n91 n_n42 ni113
01 1
10 1
.names n_n87 [20] ni13
11 1
00 1
.names n_n88 [25] ni14
11 1
00 1
.names pp_0 n_n89 ni15
01 1
10 1
.names n_n39 [31] ni110
11 1
00 1
.names n_n38 [30] ni12
11 1
00 1
.names [32] [181] n_n74
11 1
.names [23] [187] [27]
1- 1
-1 1
.names n_n87 [20] [30]
0- 1
-1 1
.names n_n88 [25] [20]
0- 1
-1 1
.names [20] [177] n_n42
01 1
.names n_n90 [24] [21]
0- 1
-1 1
.names n_n91 n_n42 [24]
0- 1
-0 1
.names pp_0 n_n89 [25]
0- 1
-0 1
.names n_n40 [21] [31]
0- 1
-1 1
.names [40] [41] [32]
1- 1
-1 1
.names [36] [37] [28]
1- 1
-1 1
.names [38] [39] [29]
1- 1
-1 1
.names [42] [43] [33]
1- 1
-1 1
.names [44] [45] [34]
1- 1
-1 1
.names pp_0 [27] [19]
11 1
.names n_n89 [28] [23]
01 1
.names pc_1 n_n89 [26]
11 1
.names n_n88 [29] [36]
01 1
.names pc_2 n_n88 [37]
11 1
.names [185] [186] [38]
11 1
.names pc_3 n_n87 [39]
11 1
.names n_n38 [33] [40]
01 1
.names pc_4 n_n38 [41]
11 1
.names n_n91 [34] [42]
01 1
.names pc_5 n_n91 [43]
11 1
.names n_n90 [178] [44]
01 1
.names pc_6 n_n90 [45]
11 1
.names n_n38 n_n87 [177]
11 1
.names n_n40 pc_7 [178]
11 1
.names n_n87 pp_0 [179]
01 1
.names n_n89 n_n88 [180]
00 1
.names [180] [179] [181]
11 1
.names n_n40 pc_8 [182]
01 1
.names n_n91 n_n90 [183]
00 1
.names n_n39 n_n87 [184]
10 1
.names [182] n_n38 [185]
10 1
.names [184] [183] [186]
11 1
.names [26] pc_0 [187]
1- 1
-1 1
.end