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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
502be5a4c669e5b6083d1d3d75ea0b57d2e3ae5c
/
.
/
vpr
/
test
/
wire.eblif
blob: 996f1f9b5a944af7f8f1a8f4c199dd2697c03eeb [
file
]
.
model top
.
inputs di
.
outputs
do
.
names di
do
1
1
.
end
