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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
502be5a4c669e5b6083d1d3d75ea0b57d2e3ae5c
/
.
/
vtr_flow
/
sdc
/
samples
/
A.sdc
blob: 10f237a171bb51825db64bb7bc53ee9fa9238988 [
file
]
create_clock
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period
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