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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
a2c37c91c9836429efe18a8bd6fd68bc656e32b7
/
.
/
libs
/
EXTERNAL
/
libsdcparse
/
test_sdcs
/
test5.sdc
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create_clock
-
period
0
*
