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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
cc4407ec903930dc82ad5f484e7dcdb0d5afae0f
/
.
/
libs
/
EXTERNAL
/
libsdcparse
/
test_sdcs
/
test5.sdc
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create_clock
-
period
0
*
