Added a is_pin_global flag and used it to mark nets as global
diff --git a/libs/libarchfpga/src/arch_util.cpp b/libs/libarchfpga/src/arch_util.cpp index 4b52bd9..074d06f 100644 --- a/libs/libarchfpga/src/arch_util.cpp +++ b/libs/libarchfpga/src/arch_util.cpp
@@ -141,6 +141,7 @@ } vtr::free(type_descriptors[i].class_inf); vtr::free(type_descriptors[i].is_ignored_pin); + vtr::free(type_descriptors[i].is_pin_global); vtr::free(type_descriptors[i].pin_class); free_pb_type(type_descriptors[i].pb_type);
diff --git a/libs/libarchfpga/src/physical_types.h b/libs/libarchfpga/src/physical_types.h index 4c491fb..0180374 100644 --- a/libs/libarchfpga/src/physical_types.h +++ b/libs/libarchfpga/src/physical_types.h
@@ -440,6 +440,8 @@ * This is usually the case for clock pins and other global pins unless the * clock_modeling option is set to route the clock through regular inter-block * wiring or through a dedicated clock network. + * is_pin_global: Whether or not this pin is marked as global. Clock pins and other specified + * global pins in the architecture file are marked as global. * * fc_specs: The Fc specifications for all pins * @@ -481,6 +483,7 @@ std::vector<int> pin_height_offset; //[0..num_pins-1] int *pin_class = nullptr; /* [0..num_pins-1] */ bool *is_ignored_pin = nullptr; /* [0..num_pins-1] */ + bool *is_pin_global = nullptr; /* [0..num_pins -1] */ std::vector<t_fc_specification> fc_specs;
diff --git a/libs/libarchfpga/src/read_xml_arch_file.cpp b/libs/libarchfpga/src/read_xml_arch_file.cpp index 1622924..378c8db 100644 --- a/libs/libarchfpga/src/read_xml_arch_file.cpp +++ b/libs/libarchfpga/src/read_xml_arch_file.cpp
@@ -567,9 +567,11 @@ Type->num_class = num_class; Type->pin_class = (int*) vtr::malloc(Type->num_pins * sizeof(int) * capacity); Type->is_ignored_pin = (bool*) vtr::malloc( Type->num_pins * sizeof(bool)* capacity); + Type->is_pin_global = (bool*) vtr::malloc( Type->num_pins * sizeof(bool)* capacity); for (i = 0; i < Type->num_pins * capacity; i++) { Type->pin_class[i] = OPEN; Type->is_ignored_pin[i] = true; + Type->is_pin_global[i] = true; } pin_count = 0; @@ -601,8 +603,14 @@ Type->class_inf[num_class].type = DRIVER; } Type->pin_class[pin_count] = num_class; + // clock pins and other specified global ports are initially specified + // as ignored pins (i.e. connections are not created in the rr_graph and + // nets connected to the port are ignored as well). Type->is_ignored_pin[pin_count] = Type->pb_type->ports[j].is_clock || Type->pb_type->ports[j].is_non_clock_global; + // clock pins and other specified global ports are flaged as global + Type->is_pin_global[pin_count] = Type->pb_type->ports[j].is_clock || + Type->pb_type->ports[j].is_non_clock_global; pin_count++; if (Type->pb_type->ports[j].equivalent == PortEquivalence::NONE) {
diff --git a/vpr/src/base/clustered_netlist.cpp b/vpr/src/base/clustered_netlist.cpp index 7bb8470..394d23b 100644 --- a/vpr/src/base/clustered_netlist.cpp +++ b/vpr/src/base/clustered_netlist.cpp
@@ -102,6 +102,12 @@ return net_is_ignored_[id]; } +bool ClusteredNetlist::is_global_net(const ClusterNetId id) const { + VTR_ASSERT_SAFE(valid_net_id(id)); + + return is_global_net_[id]; +} + /* * * Mutators @@ -184,6 +190,7 @@ if (net_id == ClusterNetId::INVALID()) { net_id = Netlist::create_net(name); net_is_ignored_.push_back(false); + is_global_net_.push_back(false); } VTR_ASSERT(validate_net_sizes()); @@ -197,6 +204,12 @@ net_is_ignored_[net_id] = state; } +void ClusteredNetlist::set_is_global_net(ClusterNetId net_id, bool state) { + VTR_ASSERT(valid_net_id(net_id)); + + is_global_net_[net_id] = state; +} + void ClusteredNetlist::remove_block_impl(const ClusterBlockId blk_id) { //Remove & invalidate pointers free_pb(block_pbs_[blk_id]); @@ -239,6 +252,7 @@ void ClusteredNetlist::clean_nets_impl(const vtr::vector_map<ClusterNetId, ClusterNetId>& net_id_map) { //Update all the net values net_is_ignored_ = clean_and_reorder_values(net_is_ignored_, net_id_map); + is_global_net_ = clean_and_reorder_values(is_global_net_, net_id_map); } void ClusteredNetlist::rebuild_block_refs_impl(const vtr::vector_map<ClusterPinId, ClusterPinId>& /*pin_id_map*/, @@ -277,6 +291,7 @@ //Net data net_is_ignored_.shrink_to_fit(); + is_global_net_.shrink_to_fit(); } @@ -307,7 +322,7 @@ } bool ClusteredNetlist::validate_net_sizes_impl(size_t num_nets) const { - if (net_is_ignored_.size() != num_nets) { + if (net_is_ignored_.size() != num_nets && is_global_net_.size() != num_nets) { return false; } return true;
diff --git a/vpr/src/base/clustered_netlist.h b/vpr/src/base/clustered_netlist.h index 56fbab6..045bd60 100644 --- a/vpr/src/base/clustered_netlist.h +++ b/vpr/src/base/clustered_netlist.h
@@ -165,6 +165,9 @@ //Returns whether the net is ignored i.e. not routed bool net_is_ignored(const ClusterNetId id) const; + //Returns whether the net is global + bool is_global_net(const ClusterNetId id) const; + public: //Public Mutators //Create or return an existing block in the netlist // name : The unique name of the block @@ -197,9 +200,12 @@ // name : The unique name of the net ClusterNetId create_net(const std::string name); - //Sets the flag in net_global_ = state + //Sets the flag in net_ignored_ = state void set_net_is_ignored(ClusterNetId net_id, bool state); + //Sets the flag in is_global_net_ = state + void set_is_global_net(ClusterNetId net_id, bool state); + private: //Private Members /* * Netlist compression/optimization @@ -250,7 +256,8 @@ //in t_type_descriptor) of logical pins //Nets - vtr::vector_map<ClusterNetId, bool> net_is_ignored_; //Boolean mapping indicating if the net is global + vtr::vector_map<ClusterNetId, bool> net_is_ignored_; //Boolean mapping indicating if the net is ignored + vtr::vector_map<ClusterNetId, bool> is_global_net_; //Boolean mapping indicating if the net is global }; #endif
diff --git a/vpr/src/base/read_netlist.cpp b/vpr/src/base/read_netlist.cpp index fd70b51..e889f80 100644 --- a/vpr/src/base/read_netlist.cpp +++ b/vpr/src/base/read_netlist.cpp
@@ -945,6 +945,11 @@ VTR_ASSERT(j == clb_nlist.pin_physical_index(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id]))); VTR_ASSERT(j == clb_nlist.net_pin_physical_index(clb_net_id, count[clb_net_id])); + // nets connecting to global pins are marked as global nets + if (clb_nlist.block_type(blk_id)->is_pin_global[j]) { + clb_nlist.set_is_global_net(clb_net_id, true); + } + if (clb_nlist.block_type(blk_id)->is_ignored_pin[j]) { clb_nlist.set_net_is_ignored(clb_net_id, true); }