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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
d7c462c4c0eea56cebb27d7af76b5a524d59b9cd
/
.
/
vtr_flow
/
sdc
/
samples
/
B.sdc
blob: fc32aca2954c9849f6c413de5c52ee4a9b8cc102 [
file
]
create_clock
-
period
2
clk
create_clock
-
period
3
clk2
set_clock_groups
-
exclusive
-
group
{
clk
}
-
group
{
clk2
}
