vtr_flow/benchmarks/blif/7/cse.blif

.model top
.inputs cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ cse_in_1_ cse_in_0_ \
clock
.outputs cse_out_0_ cse_out_2_ cse_out_1_ cse_out_4_ cse_out_3_ cse_out_6_ \
cse_out_5_
.latch    n_n39 n_n123 re clock 2
.latch    n_n40 n_n124 re clock 2
.latch    n_n41 n_n125 re clock 2
.latch    n_n42 n_n126 re clock 2
.names n_n123 n_n124 n_n126 [25] [54] [484] [485] cse_out_0_
-----11 1
-00-1-- 1
1001--- 1
.names n_n123 n_n124 n_n125 n_n126 cse_out_2_
10-0 1
0110 1
.names cse_in_2_ cse_out_5_ n_n123 n_n124 n_n125 n_n126 [45] cse_out_1_
------1 1
-1-0-0- 1
1-1010- 1
.names cse_in_3_ cse_in_2_ n_n123 n_n124 n_n126 [25] [23] cse_out_4_
--1001- 1
11-0--1 1
.names cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 [63] [23] cse_out_3_
--1111- 1
11-1--1 1
.names cse_out_5_ n_n124 n_n126 [34] [61] [493] [494] cse_out_6_
---1--- 1
11----- 1
1-0---- 1
-----11 1
-11-1-- 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 \
cse_out_5_
1001000 1
.names cse_in_6_ cse_in_5_ n_n123 [19] [137] [457] n_n39
-----1 1
10--1- 1
1011-- 1
.names cse_in_6_ cse_in_5_ cse_in_4_ [21] [116] [465] n_n40
----1- 1
10---1 1
1001-- 1
.names cse_in_6_ cse_in_5_ [30] [65] [52] [466] n_n41
--1--- 1
10-1-- 1
10--11 1
.names cse_out_5_ [34] [22] [89] [91] [478] n_n42
1----- 1
-1---- 1
---1-- 1
----1- 1
--1--1 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [34]
1011110 1
1101110 1
.names cse_in_6_ cse_in_5_ cse_in_3_ cse_in_2_ n_n125 [25]
10101 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n126 [63]
0----1 1
-1---1 1
--1--1 1
--0--0 1
---111 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 [22]
00---1 1
0-0--1 1
-0-0-1 1
0--0-0 1
0-110- 1
-10-01 1
--1101 1
-1-110 1
.names cse_in_6_ cse_in_5_ cse_in_4_ n_n123 n_n125 [23]
10000 1
.names cse_in_4_ n_n123 n_n124 n_n125 n_n126 [30]
11110 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [65]
-0---11 1
--0--11 1
1--111- 1
-0-011- 1
--0011- 1
-0-101- 1
--0101- 1
-1-0010 1
1000000 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_2_ n_n123 n_n125 [54]
100100 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 [73]
10-10-1 1
100-100 1
.names cse_in_4_ cse_in_3_ cse_in_2_ cse_in_1_ n_n124 n_n125 n_n126 [19]
1---11- 1
-0---11 1
----011 1
---0-00 1
----000 1
0-1-00- 1
-1--101 1
-00-0-0 1
.names cse_in_3_ cse_in_2_ cse_in_1_ n_n123 n_n124 n_n125 n_n126 [21]
00-01-- 1
-0-100- 1
0--00-1 1
00---11 1
0--01-0 1
11-010- 1
--01100 1
.names cse_in_4_ n_n123 n_n125 [52]
000 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 [61]
10010-1 1
10-1001 1
1000100 1
.names cse_in_6_ cse_in_5_ cse_in_0_ n_n123 n_n124 n_n126 [45]
0---01 1
-1--01 1
0-10-1 1
-110-1 1
.names cse_in_6_ cse_in_5_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 [89]
1010011 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ n_n123 n_n124 n_n125 [91]
1001010 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [116]
1111110 1
1001110 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [137]
100-0-0 1
-0-0010 1
00100-0 1
.names cse_in_3_ cse_in_2_ n_n124 n_n126 [23] [30] [73] [457]
-----1- 1
--11--1 1
111-1-- 1
.names cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [465]
0-0-1- 1
00-011 1
1-1101 1
01-010 1
.names cse_in_3_ cse_in_2_ n_n124 [466]
110 1
.names cse_in_6_ cse_in_5_ n_n126 [478]
101 1
.names cse_in_6_ cse_in_5_ cse_in_1_ n_n126 [484]
1000 1
.names cse_in_4_ n_n123 n_n124 n_n125 [485]
1110 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_2_ [493]
1001 1
.names cse_in_3_ n_n123 n_n124 n_n125 n_n126 [494]
01111 1
.end