vtr_flow/benchmarks/blif/8/cse.blif

.model top
.inputs cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ cse_in_1_ cse_in_0_ \
clock
.outputs cse_out_0_ cse_out_2_ cse_out_1_ cse_out_4_ cse_out_3_ cse_out_6_ \
cse_out_5_
.latch    n_n39 n_n123 re clock 2
.latch    n_n40 n_n124 re clock 2
.latch    n_n41 n_n125 re clock 2
.latch    n_n42 n_n126 re clock 2
.names [86] [87] [88] cse_out_0_
1-- 1
-1- 1
--1 1
.names n_n123 n_n124 n_n125 n_n126 cse_out_2_
10-0 1
0110 1
.names cse_out_5_ n_n124 n_n126 [490] cse_out_1_
---1 1
100- 1
.names [38] [43] cse_out_4_
1- 1
-1 1
.names n_n123 n_n124 n_n125 [40] [63] cse_out_3_
---1- 1
111-1 1
.names n_n124 [34] [60] [28] [493] [494] cse_out_6_
-1---- 1
---1-- 1
1-1--- 1
----11 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 \
cse_out_5_
1001000 1
.names cse_in_6_ cse_in_5_ n_n124 n_n126 [40] [30] [73] [72] n_n39
----1--- 1
-----1-- 1
--11--1- 1
10-----1 1
.names cse_in_6_ cse_in_5_ [70] [116] n_n40
---1 1
101- 1
.names cse_in_6_ cse_in_5_ [38] [30] [65] n_n41
--1-- 1
---1- 1
10--1 1
.names cse_in_6_ cse_in_5_ cse_out_5_ n_n126 [34] [22] [480] n_n42
--1---- 1
----1-- 1
------1 1
10-1-1- 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [34]
1011110 1
1101110 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 n_n126 \
[60]
1001000- 1
10010-11 1
10-10011 1
10001001 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 \
[38]
10011000 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 \
[40]
10011010 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n126 [63]
0----1 1
-1---1 1
--1--1 1
--0--0 1
---111 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 [22]
00---1 1
0-0--1 1
-0-0-1 1
0--0-0 1
0-110- 1
-10-01 1
--1101 1
-1-110 1
.names cse_in_4_ n_n123 n_n124 n_n125 n_n126 [30]
11110 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [65]
-0---11 1
--0--11 1
1--111- 1
-0-011- 1
--0011- 1
-0-101- 1
--0101- 1
-1-0010 1
1000000 1
.names cse_in_4_ cse_in_3_ cse_in_2_ cse_in_1_ n_n123 n_n124 n_n125 n_n126 \
[70]
-0--0-1- 1
000-01-- 1
0-0-100- 1
00--00-1 1
000---11 1
-00--011 1
-1--1101 1
00--01-0 1
-01--010 1
011-010- 1
0--01100 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 [73]
10-10-1 1
100-100 1
.names cse_in_4_ cse_in_3_ cse_in_2_ cse_in_1_ n_n123 n_n124 n_n125 n_n126 \
[72]
1---111- 1
-0--1-11 1
----1011 1
---01-00 1
----1000 1
0-1-100- 1
-1--1101 1
100--0-0 1
-00-10-0 1
-0--0010 1
001-00-0 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n125 n_n126 \
[28]
10010000 1
.names cse_in_6_ cse_in_5_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 \
[43]
10101010 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_1_ n_n123 n_n124 n_n125 n_n126 \
[86]
10101100 1
.names cse_in_6_ cse_in_5_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 \
[87]
10101010 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 \
[88]
10010000 1
.names cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 n_n126 [116]
1111110 1
1001110 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_3_ cse_in_2_ n_n123 n_n124 n_n125 \
[480]
10-10011 1
1001-010 1
.names cse_in_6_ cse_in_5_ cse_in_2_ cse_in_0_ n_n123 n_n124 n_n125 n_n126 \
[490]
0----0-1 1
-1---0-1 1
0--10--1 1
-1-10--1 1
--1-1010 1
.names cse_in_6_ cse_in_5_ cse_in_4_ cse_in_2_ [493]
1001 1
.names cse_in_3_ n_n123 n_n124 n_n125 n_n126 [494]
01111 1
.end