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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
e826f57b27df591f83a2845a638636875713f938
/
.
/
vtr_flow
/
benchmarks
/
microbenchmarks
/
multiconnected_lut.blif
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.
model top
.
inputs a b c d e
.
outputs f
#This LUT has multiple connections, net 'a' connects multiple times
.
names a b a c d e f
-
00110
1
-
1111
-
1
-
1
-
111
1
.
end
