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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
f98a99ffc7d63c92e4d87d6b024e649c80a4c681
/
.
/
libs
/
EXTERNAL
/
libsdcparse
/
test_sdcs
/
test11.sdc
blob: c3f4baffad6f04b9a5cdebc76e4d4341636d0d98 [
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set_disable_timing
-
from
{
asdf
/
qwer
/
cin
}
-
to
{
awer
/
zxc
/
guy3w
}
set_disable_timing
-
from
asdf
/
qwer
/
cin
-
to awer
/
zxc
/
guy3w
set_disable_timing
-
from
[
get_pins
{
asdf
/
qwer
/
cin
}]
-
to awer
/
zxc
/
guy3w
