Sign in
foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
f98a99ffc7d63c92e4d87d6b024e649c80a4c681
/
.
/
libs
/
EXTERNAL
/
libsdcparse
/
test_sdcs
/
test5.sdc
blob: 10f237a171bb51825db64bb7bc53ee9fa9238988 [
file
] [
log
] [
blame
]
create_clock
-
period
0
*