Sign in
foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
fc2651cb40fa02b7c0c2f8e919e734304a30ccc9
/
.
/
vpr
/
test
/
wire.eblif
blob: 996f1f9b5a944af7f8f1a8f4c199dd2697c03eeb [
file
] [
log
] [
blame
]
.
model top
.
inputs di
.
outputs
do
.
names di
do
1
1
.
end