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foss-fpga-tools/third_party/vtr-verilog-to-routing/refs/heads/odin_sim_buffer/./vpr/src/base/CheckArch.h
blob: d4a617cea32e9b1a79fcded7a8ad32c873bac41b [file] [edit]
#ifndef CHECKARCH_H
#define CHECKARCH_H
void CheckArch(const t_arch& Arch);
#endif