Google Git
Sign in
foss-fpga-tools / third_party / vtr-verilog-to-routing / refs/heads/rr_graph_obj / . / ace2 / sim.h
blob: adc5fb37d17479e8aae13a91cd6402a678dd6012 [file] [log] [blame] [edit]
#ifndef __ACE_SIM_H__
#define __ACE_SIM_H__
#include "ace.h"
void ace_sim_activities(Abc_Ntk_t * ntk, Vec_Ptr_t * node_vec, int max_cycles,
double threshold);
#endif