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foss-fpga-tools
/
third_party
/
yosys
/
32f0296df1b97ff5b3bcc442ac38f27a786947d6
/
.
/
tests
/
lut
/
check_map_lut6.ys
blob: 8a32e4d106bc681ad9320bae2310dc5af47e25c8 [
file
]
chparam
-
set
LUT_WIDTH
6
top
simplemap
equiv_opt
-
assert
techmap
-
D LUT_WIDTH
=
6
-
map
+/
cmp2lut
.
v
design
-
load postopt
equiv_opt
-
assert
techmap
-
D LUT_WIDTH
=
6
-
map
+/
gate2lut
.
v
design
-
load postopt
select
-
assert
-
count
0
t
:*
t
:
$lut
%
d
