Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
yosys
/
5603595e5c0efd2afc9ba810e6e5992e5d81d44c
/
.
/
tests
/
lut
/
map_and.v
blob: 68ae33fd6deeac155afa349086a7ec1e3ccd141b [
file
]
module
top
(...);
input a
,
b
;
output y
;
assign y
=
a
&
b
;
endmodule