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foss-fpga-tools
/
third_party
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yosys
/
6028f5df1a7f86e73028c6a0c2b63ab16a1335d6
/
.
/
tests
/
errors
/
syntax_err09.v
blob: 1e472eb94ae9d0283aecd18824b50d5e458ea338 [
file
]
module
a
(
input wire x
=
1
'b0);
endmodule
