Revert "Merge branch 'diego/memattr' into eddie/exp" This reverts commit 15e032054f548ebd01b13762f7461d19de8429c1, reversing changes made to a0ce4823207ebe517daafe99d18e813e4ee608a1.
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index 52e7ac7..aa8f941 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc
@@ -134,8 +134,6 @@ dict<string, int> min_limits, max_limits; bool or_next_if_better, make_transp, make_outreg; char shuffle_enable; - IdString attr; - Const value; }; dict<IdString, vector<bram_t>> brams; @@ -329,13 +327,6 @@ continue; } - if (GetSize(tokens) >= 2 && tokens[0] == "attribute") { - data.attr = RTLIL::escape_id(tokens[1]); - if (GetSize(tokens) > 2) - data.value = tokens[2]; - continue; - } - syntax_error(); } } @@ -797,6 +788,7 @@ match_properties["dcells"] = ((mem_width + bram.dbits - 1) / bram.dbits); match_properties["acells"] = ((mem_size + (1 << bram.abits) - 1) / (1 << bram.abits)); match_properties["cells"] = match_properties["dcells"] * match_properties["acells"] * match_properties["dups"]; + log(" Updated properties: dups=%d waste=%d efficiency=%d\n", match_properties["dups"], match_properties["waste"], match_properties["efficiency"]); @@ -814,28 +806,13 @@ if (!match_properties.count(it.first)) log_error("Unknown property '%s' in match rule for bram type %s.\n", it.first.c_str(), log_id(match.name)); + if (match_properties[it.first] <= it.second) + continue; log(" Rule for bram type %s rejected: requirement 'max %s %d' not met.\n", log_id(match.name), it.first.c_str(), it.second); return false; } - if (!match.attr.empty()) { - auto it = cell->attributes.find(match.attr); - if (it == cell->attributes.end()) { - if (!match.value.empty()) - log(" Rule for bram type %s rejected: requirement 'attribute %s=\"%s\"' not met.\n", - log_id(match.name), log_id(match.attr), match.value.decode_string().c_str()); - return false; - } - else { - if (it->second != match.value) { - log(" Rule for bram type %s rejected: requirement 'attribute %s=\"%s\"' not met.\n", - log_id(match.name), log_id(match.attr), match.value.decode_string().c_str()); - return false; - } - } - } - if (mode == 1) return true; } @@ -1123,24 +1100,6 @@ goto next_match_rule; } - if (!match.attr.empty()) { - auto it = cell->attributes.find(match.attr); - if (it == cell->attributes.end()) { - if (!match.value.empty()) { - log(" Rule for bram type %s rejected: requirement 'attribute %s=\"%s\"' not met.\n", - log_id(match.name), log_id(match.attr), match.value.decode_string().c_str()); - goto next_match_rule; - } - } - else { - if (it->second != match.value) { - log(" Rule for bram type %s rejected: requirement 'attribute %s=\"%s\"' not met.\n", - log_id(match.name), log_id(match.attr), match.value.decode_string().c_str()); - goto next_match_rule; - } - } - } - log(" Rule #%d for bram type %s (variant %d) accepted.\n", i+1, log_id(bram.name), bram.variant); if (or_next_if_better || !best_rule_cache.empty()) @@ -1283,9 +1242,6 @@ log("A match containing the command 'shuffle_enable A' will re-organize\n"); log("the data bits to accommodate the enable pattern of port A.\n"); log("\n"); - log("A match containing the command 'attribute' will bypass min bits/efficiency\n"); - log("to select the type of memory.\n"); - log("\n"); } void execute(vector<string> args, Design *design) YS_OVERRIDE {
diff --git a/passes/memory/memory_collect.cc b/passes/memory/memory_collect.cc index 9dcb3f0..6acbce6 100644 --- a/passes/memory/memory_collect.cc +++ b/passes/memory/memory_collect.cc
@@ -218,10 +218,6 @@ mem->setPort("\\RD_DATA", sig_rd_data); mem->setPort("\\RD_EN", sig_rd_en); - // Copy attributes from RTLIL memory to $mem - for (auto attr : memory->attributes) - mem->attributes[attr.first] = attr.second; - for (auto c : memcells) module->remove(c);
diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt index 7d3d997..ca71924 100644 --- a/techlibs/xilinx/xc7_xcu_brams.txt +++ b/techlibs/xilinx/xc7_xcu_brams.txt
@@ -85,14 +85,6 @@ min efficiency 5 shuffle_enable B make_transp - attribute ram_style - or_next_if_better -endmatch - -match $__XILINX_RAMB18_SDP - shuffle_enable B - make_transp - attribute ram_style block or_next_if_better endmatch