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foss-fpga-tools
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yosys
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8b68a939f451731cc82fd03b1048d9aab471f47b
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.
/
manual
/
PRESENTATION_ExSyn
/
opt_03.v
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module
test
(
input
[
3
:
0
]
A
,
B
,
output
[
3
:
0
]
Y
,
Z
);
assign Y
=
A
+
B
,
Z
=
B
+
A
;
endmodule
