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foss-fpga-tools
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third_party
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yosys
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a12fc783612f52aecdce6863e905dc245343a0ff
/
.
/
examples
/
gowin
/
demo.sdc
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create_clock
-
name clk
-
period
20
-
waveform
{
0
10
}
[
get_ports
{
clk
}]
