Sign in
foss-fpga-tools
/
third_party
/
yosys
/
a26c52394f193a3f912e0fdbb688c78110a0c974
/
.
/
tests
/
errors
/
syntax_err09.v
blob: 1e472eb94ae9d0283aecd18824b50d5e458ea338 [
file
]
module
a
(
input wire x
=
1
'b0);
endmodule
