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foss-fpga-tools
/
third_party
/
yosys
/
a834cfa50ac9a22621691c9e3c6304e5faabef98
/
.
/
tests
/
lut
/
check_map.ys
blob: dc0aaffc27246702eb10de16aa9c36f03a6033b1 [
file
]
simplemap
equiv_opt
-
assert
techmap
-
map
+/
gate2lut
.
v
-
D LUT_WIDTH
=
4
design
-
load postopt
select
-
assert
-
count
1
t
:
$lut