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foss-fpga-tools
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third_party
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yosys
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refs/heads/dave/dotstar
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.
/
tests
/
arch
/
common
/
dffs.v
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module
dff
(
input d
,
clk
,
output reg q
);
always
@(
posedge clk
)
q
<=
d
;
endmodule
module
dffe
(
input d
,
clk
,
en
,
output reg q
);
initial
begin
q
=
0
;
end
always
@(
posedge clk
)
if
(
en
)
q
<=
d
;
endmodule