Sign in
foss-fpga-tools
/
third_party
/
yosys
/
refs/heads/eddie/exp2
/
.
/
tests
/
rpc
/
design.v
blob: 80f1dac1a2653fec55eb9cb7c89599fc9abda1b0 [
file
] [
log
] [
blame
] [
edit
]
module
top
(
input
[
3
:
0
]
i
,
output
[
3
:
0
]
o
);
python_inv
#(
.
width
(
4
)
)
inv
(
.
i
(
i
),
.
o
(
o
),
);
endmodule