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foss-fpga-tools
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third_party
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yosys
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refs/heads/mwk/xilinx-dff-improvements
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.
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techlibs
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anlogic
/
drams.txt
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bram $__ANLOGIC_DRAM16X4
init 1
abits 4
dbits 4
groups 2
ports 1 1
wrmode 0 1
enable 0 1
transp 0 0
clocks 0 1
clkpol 0 1
endbram
match $__ANLOGIC_DRAM16X4
make_outreg
endmatch
