| /********************************************/ |
| /* */ |
| /* Supergate cell library for Bench marking */ |
| /* */ |
| /* Symbiotic EDA GmbH / Moseley Instruments */ |
| /* Niels A. Moseley */ |
| /* */ |
| /* Process: none */ |
| /* */ |
| /* Date : 24-03-2019 */ |
| /* Version: 1.0 */ |
| /* Version: 1.1 - Removed semicolons in */ |
| /* full adder */ |
| /* */ |
| /********************************************/ |
| |
| /* |
| semi colon is missing in full-adder specification |
| some TSMC liberty files are formatted this way.. |
| */ |
| |
| library(supergate) { |
| technology (cmos); |
| revision : 1.0; |
| |
| time_unit : "1ps"; |
| pulling_resistance_unit : "1kohm"; |
| voltage_unit : "1V"; |
| current_unit : "1uA"; |
| |
| capacitive_load_unit(1,ff); |
| |
| default_inout_pin_cap : 7.0; |
| default_input_pin_cap : 7.0; |
| default_output_pin_cap : 0.0; |
| default_fanout_load : 1.0; |
| |
| default_wire_load_capacitance : 0.1; |
| default_wire_load_resistance : 1.0e-3; |
| default_wire_load_area : 0.0; |
| |
| nom_process : 1.0; |
| nom_temperature : 25.0; |
| nom_voltage : 1.2; |
| |
| delay_model : generic_cmos; |
| |
| /* full adder */ |
| cell (fulladder) { |
| area : 8 |
| pin(A) { |
| direction : input |
| } |
| pin(B) { |
| direction : input |
| } |
| pin(CI) { |
| direction : input |
| } |
| pin(CO) { |
| direction : output |
| function : "(((A * B)+(B * CI))+(CI * A))" |
| } |
| pin(Y) { |
| direction: output |
| function : "((A^B)^CI)" |
| } |
| } |
| |
| } /* end */ |
| |
| |
