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foss-fpga-tools
/
third_party
/
yosys
/
refs/heads/mwk/xilinx-dff-improvements
/
.
/
tests
/
lut
/
map_xor.v
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module
top
(...);
input a
,
b
;
output y
;
assign y
=
a
^
b
;
endmodule