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foss-fpga-tools / third_party / yosys / refs/heads/mwk/xilinx-dsp48-sim / . / techlibs / gowin
tree: c684a18d18c9bba6c36544a460b72118183828bc [path history] [tgz]
  1. arith_map.v
  2. bram.txt
  3. brams_init.py
  4. brams_init3.vh
  5. brams_map.v
  6. cells_map.v
  7. cells_sim.v
  8. determine_init.cc
  9. dram.txt
  10. drams_map.v
  11. Makefile.inc
  12. synth_gowin.cc