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foss-fpga-tools / third_party / yosys / refs/heads/mwk/xilinx-dsp48-sim / . / techlibs / ice40
tree: 90279f753b86a259f3d39bd116d490819ff179b0 [path history] [tgz]
  1. tests/
  2. .gitignore
  3. abc9_hx.box
  4. abc9_hx.lut
  5. abc9_lp.box
  6. abc9_lp.lut
  7. abc9_model.v
  8. abc9_u.box
  9. abc9_u.lut
  10. arith_map.v
  11. brams.txt
  12. brams_init.py
  13. brams_map.v
  14. cells_map.v
  15. cells_sim.v
  16. dsp_map.v
  17. ice40_braminit.cc
  18. ice40_ffinit.cc
  19. ice40_ffssr.cc
  20. ice40_opt.cc
  21. latches_map.v
  22. Makefile.inc
  23. synth_ice40.cc