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foss-fpga-tools/vtr-xml-utils/219c0edf5ff3092bfe54c26afb5bb6a36c12b752
commit
219c0edf5ff3092bfe54c26afb5bb6a36c12b752
[log]
author
Jeppe Johansen <jeppe@j-software.dk>
Tue Jul 17 12:28:00 2018 +0200
committer
Grzegorz Latosinski <glatosinski@antmicro.com>
Fri Nov 08 11:47:18 2019 +0100
tree
09da861003aba94c92b77d95461ef85680f1fc72
parent
84591bf7ff2d525f55208b6363c3efb2ecef7fd3 [diff]
Made switch_name optional.
Added the metadata tags.
Moved pack_pattern to subtags of interconnect.
Flattened types in routing_resource.xsd.

Signed-off-by: Jeppe Johansen <jeppe@j-software.dk>
2 files changed
tree: 09da861003aba94c92b77d95461ef85680f1fc72
  1. .gitignore/
  2. vtr_xml_utils/
  3. CODE_OF_CONDUCT.md
  4. CONTRIBUTING.md
  5. COPYING
  6. fpga_architecture.xsd
  7. packed_netlist.xsd
  8. README.md
  9. routing_resource.xsd
  10. setup.cfg
  11. setup.py
  12. xmlsort.xsl
README.md

Utilities for working with VtR XML Files

This repository contains utilities for working with Verilog to Routing XML files.