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foss-fpga-tools
/
yosys-symbiflow-plugins
/
08430ec4f53d1cf9d6a2091211d6c5ce501d5486
/
.
/
sdc-plugin
/
tests
/
pll_dangling_wires
/
pll_dangling_wires.input.sdc
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create_clock
-
period
10
-
waveform
{
0
5
}
clk
