SDC: Don't write create_clock commands for port nets Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>

diff --git a/sdc-plugin/clocks.cc b/sdc-plugin/clocks.cc
index 4a99e37..e0c7e9d 100644
--- a/sdc-plugin/clocks.cc
+++ b/sdc-plugin/clocks.cc

@@ -170,10 +170,20 @@
 void Clocks::WriteSdc(std::ostream& file) {
     for (auto& clock : clocks_) {
 	auto clock_wires = clock.GetClockWires();
+	// FIXME: Input port nets are not found in VPR
+	if (std::all_of(clock_wires.begin(), clock_wires.end(),
+	                [&](RTLIL::Wire* wire) { return wire->port_input; })) {
+	    continue;
+	}
 	file << "create_clock -period " << clock.Period();
 	file << " -waveform {" << clock.RisingEdge() << " "
 	     << clock.FallingEdge() << "}";
-	file << " " << Clock::ClockWireName(clock_wires.at(0));
+	for (auto clock_wire : clock_wires) {
+	    if (clock_wire->port_input) {
+		continue;
+	    }
+	    file << " " << Clock::ClockWireName(clock_wire);
+	}
 	file << std::endl;
     }
 }