Introspection: Refactor get_ports and get_pins commands Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
diff --git a/design_introspection-plugin/get_pins.cc b/design_introspection-plugin/get_pins.cc index f57662d..aa557e8 100644 --- a/design_introspection-plugin/get_pins.cc +++ b/design_introspection-plugin/get_pins.cc
@@ -6,33 +6,28 @@ std::string GetPins::SelectionType() { return "c"; } -void GetPins::execute(std::vector<std::string> args, RTLIL::Design* design) { - if (design->top_module() == nullptr) { - log_cmd_error("No top module detected\n"); - } +void GetPins::ExecuteSelection([[gnu::unused]] RTLIL::Design* design, + [[gnu::unused]] const CommandArgs& args) { +} - CommandArgs parsed_args(ParseCommand(args)); - Tcl_Obj* tcl_list = Tcl_NewListObj(0, NULL); - for (auto obj : parsed_args.selection_objects) { +GetPins::SelectionObjects GetPins::ExtractSelection(RTLIL::Design* design, const CommandArgs& args) { + SelectionObjects selection_objects; + for (auto obj : args.selection_objects) { size_t port_separator = obj.find_last_of("/"); std::string cell = obj.substr(0, port_separator); std::string port = obj.substr(port_separator + 1); SelectionObjects selection{RTLIL::unescape_id(design->top_module()->name) + "/" + SelectionType() + ":" + cell}; extra_args(selection, 0, design); - ExtractSingleSelection(tcl_list, design, port, parsed_args); + ExtractSingleSelection(selection_objects, design, port, args); } - if (!parsed_args.is_quiet) { + if (!args.is_quiet) { log("\n"); } - Tcl_SetObjResult(yosys_get_tcl_interp(), tcl_list); + return selection_objects; } -GetPins::SelectionObjects GetPins::ExtractSelection(RTLIL::Design* design, const CommandArgs& args) { - return SelectionObjects(); -} - -void GetPins::ExtractSingleSelection(Tcl_Obj* tcl_list, RTLIL::Design* design, +void GetPins::ExtractSingleSelection(SelectionObjects& objects, RTLIL::Design* design, const std::string& port_name, const CommandArgs& args) { if (design->selected_modules().empty()) { @@ -58,9 +53,7 @@ if (!args.is_quiet) { log("%s ", pin_name.c_str()); } - Tcl_Obj* value_obj = Tcl_NewStringObj(pin_name.c_str(), -1); - Tcl_ListObjAppendElement(yosys_get_tcl_interp(), tcl_list, - value_obj); + objects.push_back(pin_name); } } }
diff --git a/design_introspection-plugin/get_pins.h b/design_introspection-plugin/get_pins.h index ab5bf75..57a619d 100644 --- a/design_introspection-plugin/get_pins.h +++ b/design_introspection-plugin/get_pins.h
@@ -11,10 +11,12 @@ private: std::string TypeName() override; std::string SelectionType() override; - void execute(std::vector<std::string> args, RTLIL::Design* design) override; SelectionObjects ExtractSelection(RTLIL::Design* design, const CommandArgs& args) override; - void ExtractSingleSelection(Tcl_Obj* tcl_list, RTLIL::Design* design, + void ExecuteSelection(RTLIL::Design* design, + const CommandArgs& args) override; + void ExtractSingleSelection(SelectionObjects& objects, + RTLIL::Design* design, const std::string& port_name, const CommandArgs& args); };
diff --git a/design_introspection-plugin/get_ports.cc b/design_introspection-plugin/get_ports.cc index 8c60712..be9e7f3 100644 --- a/design_introspection-plugin/get_ports.cc +++ b/design_introspection-plugin/get_ports.cc
@@ -6,20 +6,13 @@ std::string GetPorts::SelectionType() { return "x"; } -GetPorts::SelectionObjects GetPorts::ExtractSelection(RTLIL::Design* design, const CommandArgs& args) { - return SelectionObjects(); +void GetPorts::ExecuteSelection([[gnu::unused]] RTLIL::Design* design, + [[gnu::unused]] const CommandArgs& args) { } -void GetPorts::execute(std::vector<std::string> args, RTLIL::Design* design) { - if (args.size() < 2) { - log_cmd_error("No port specified.\n"); - } - RTLIL::Module* top_module = design->top_module(); - if (top_module == nullptr) { - log_cmd_error("No top module detected\n"); - } - // TODO handle more than one port - std::string port_name = args.at(1); +GetPorts::SelectionObjects GetPorts::ExtractSelection(RTLIL::Design* design, + const CommandArgs& args) { + std::string port_name = args.selection_objects.at(0); std::string port_str(port_name.size(), '\0'); int bit(0); if (!sscanf(port_name.c_str(), "%[^[][%d]", &port_str[0], &bit)) { @@ -28,17 +21,21 @@ port_str.resize(strlen(port_str.c_str())); RTLIL::IdString port_id(RTLIL::escape_id(port_str)); - Tcl_Interp* interp = yosys_get_tcl_interp(); - if (auto wire = top_module->wire(port_id)) { + SelectionObjects objects; + if (auto wire = design->top_module()->wire(port_id)) { if (wire->port_input || wire->port_output) { if (bit >= wire->start_offset && bit < wire->start_offset + wire->width) { - Tcl_Obj* tcl_string = Tcl_NewStringObj(port_name.c_str(), -1); - Tcl_SetObjResult(interp, tcl_string); - log("Found port %s\n", port_name.c_str()); - return; + objects.push_back(port_name); + if (!args.is_quiet) { + log("%s ", port_name.c_str()); + } } } } - log_error("Couldn't find port %s\n", port_name.c_str()); + if (objects.size() == 0 and !args.is_quiet) { + log_error("Couldn't find port %s\n", port_name.c_str()); + } + return objects; } +
diff --git a/design_introspection-plugin/get_ports.h b/design_introspection-plugin/get_ports.h index 7a66d6d..4e66b36 100644 --- a/design_introspection-plugin/get_ports.h +++ b/design_introspection-plugin/get_ports.h
@@ -11,9 +11,11 @@ private: std::string TypeName() override; std::string SelectionType() override; - void execute(std::vector<std::string> args, RTLIL::Design* design) override; + /* void execute(std::vector<std::string> args, RTLIL::Design* design) override; */ SelectionObjects ExtractSelection(RTLIL::Design* design, const CommandArgs& args) override; + void ExecuteSelection(RTLIL::Design* design, + const CommandArgs& args) override; }; #endif // GET_PORTS_H_