systemverilog-plugin: apply review comment

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>

systemverilog-plugin/UhdmAst.cc

diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index 54dfc50..5d317c7 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -4336,7 +4336,7 @@
     }
     visit_one_to_one({vpiTypedef}, obj_h, [&](AST::AstNode *node) {
         if (node) {
-            if (current_node->children.empty() || (!current_node->children.empty() && current_node->children[0]->type != AST::AST_WIRETYPE)) {
+            if (current_node->children.empty() || current_node->children[0]->type != AST::AST_WIRETYPE) {
                 if (!node->str.empty()) {
                     auto wiretype_node = new AST::AstNode(AST::AST_WIRETYPE);
                     wiretype_node->str = node->str;