Added the QL_DSP1 block back.

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>

ql-qlf-plugin/qlf_k6n10f/cells_sim.v

diff --git a/ql-qlf-plugin/qlf_k6n10f/cells_sim.v b/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
index c69c38c..93fa6e9 100644
--- a/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
+++ b/ql-qlf-plugin/qlf_k6n10f/cells_sim.v
@@ -664,24 +664,24 @@
 
 endmodule
 
-//(* blackbox *)
-//module QL_DSP1 (
-//    input  [19:0] a,
-//    input  [17:0] b,
-//    input  clk0,
-//    (* clkbuf_sink *)
-//    input  clk1,
-//    (* clkbuf_sink *)
-//    input  [ 1:0] feedback0,
-//    input  [ 1:0] feedback1,
-//    input  load_acc0,
-//    input  load_acc1,
-//    input  reset0,
-//    input  reset1,
-//    output reg [37:0] z
-//);
-//    parameter MODE_BITS = 27'b00000000000000000000000000;
-//endmodule  /* QL_DSP1 */
+(* blackbox *)
+module QL_DSP1 (
+    input  [19:0] a,
+    input  [17:0] b,
+    input  clk0,
+    (* clkbuf_sink *)
+    input  clk1,
+    (* clkbuf_sink *)
+    input  [ 1:0] feedback0,
+    input  [ 1:0] feedback1,
+    input  load_acc0,
+    input  load_acc1,
+    input  reset0,
+    input  reset1,
+    output reg [37:0] z
+);
+    parameter MODE_BITS = 27'b00000000000000000000000000;
+endmodule  /* QL_DSP1 */
 
 (* blackbox *) // TODO: add sim model
 module dsp_t1_20x18x64 (