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foss-fpga-tools
/
yosys-symbiflow-plugins
/
91626594a7e8cbc5e540c0870de6367d1ee9d329
/
.
/
systemverilog-plugin
/
tests
/
translate_off
/
translate_off.tcl
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yosys -import
if
{
[
info
procs read_uhdm
]
==
{
}
}
{
plugin -i systemverilog
}
yosys -import ;
# ingest plugin commands
set
TMP_DIR
$::
env(TEST_OUTPUT_PREFIX)
/
tmp
file mkdir
$
TMP_DIR
read_systemverilog -o
$
TMP_DIR
$::
env(DESIGN_TOP)
.
v
