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foss-fpga-tools
/
yosys-symbiflow-plugins
/
ab22c1c7b821a11cd6d329f42875d5ac642620f7
/
.
/
integrateinv-plugin
/
tests
/
multi_bit
/
multi_bit.tcl
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yosys -import
plugin -i integrateinv
read_verilog -icells
$::
env(DESIGN_TOP)
.
v
hierarchy -check -auto-top
debug integrateinv
select t
:
\$_NOT_ -assert-count
2
select t
:
box r
:
INV_A=
2'b10
%
i -assert-count
1
