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foss-fpga-tools
/
yosys-symbiflow-plugins
/
b64bd44b5e2987a29e120a32e0d81b1f4e5b4c72
/
.
/
sdc-plugin
/
tests
/
pll_dangling_wires
/
pll_dangling_wires.input.sdc
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create_clock
-
period
10
-
waveform
{
0
5
}
clk
