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foss-fpga-tools
/
yosys-symbiflow-plugins
/
b95b991d0343a4d92dc8e19f0f197f80baa5c2c0
/
.
/
sdc-plugin
/
tests
/
pll_fbout_phase
/
pll_fbout_phase.input.sdc
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create_clock
-
period
10
-
waveform
{
0
5
}
clk
