Sign in
foss-fpga-tools
/
yosys-symbiflow-plugins
/
bd951969a8f6fbe13f4c47fd98f2eade4cf731a2
/
.
/
systemverilog-plugin
/
tests
/
translate_off
/
translate_off.tcl
blob: 15e411b142b33d3da18eda3a45655e8bd249096a [
file
]
yosys -import
if
{
[
info
procs read_uhdm
]
==
{
}
}
{
plugin -i systemverilog
}
yosys -import ;
# ingest plugin commands
set
TMP_DIR
::
env(TEST_OUTPUT_PREFIX)
/
tmp
file mkdir
$
TMP_DIR
read_systemverilog -o
$
TMP_DIR
$::
env(DESIGN_TOP)
.
v
