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foss-fpga-tools
/
yosys-symbiflow-plugins
/
cab19a328d1630adf2f4c3503e653125473d6a09
/
.
/
sdc-plugin
/
tests
/
pll_dangling_wires
/
pll_dangling_wires.input.sdc
blob: 00354d767cfa6ac297cd4cad73c718132504e7f8 [
file
]
create_clock
-
period
10
-
waveform
{
0
5
}
clk
