Merge pull request #272 from antmicro/verilog-via-uhdm-force-parse

Force -parse flag for Surelog when reading Verilog directly

uhdm-plugin/uhdmsurelogastfrontend.cc

diff --git a/uhdm-plugin/uhdmsurelogastfrontend.cc b/uhdm-plugin/uhdmsurelogastfrontend.cc
index 24bcbb1..4828896 100644
--- a/uhdm-plugin/uhdmsurelogastfrontend.cc
+++ b/uhdm-plugin/uhdmsurelogastfrontend.cc
@@ -78,6 +78,7 @@
 }
 
 struct UhdmSurelogAstFrontend : public UhdmCommonFrontend {
+    UhdmSurelogAstFrontend(std::string name, std::string short_help) : UhdmCommonFrontend(name, short_help) {}
     UhdmSurelogAstFrontend() : UhdmCommonFrontend("verilog_with_uhdm", "generate/read UHDM file") {}
     void print_read_options() override
     {
@@ -135,4 +136,8 @@
     void call_log_header(RTLIL::Design *design) override { log_header(design, "Executing Verilog with UHDM frontend.\n"); }
 } UhdmSurelogAstFrontend;
 
+struct UhdmSystemVerilogFrontend : public UhdmSurelogAstFrontend {
+    UhdmSystemVerilogFrontend() : UhdmSurelogAstFrontend("systemverilog", "read SystemVerilog files") {}
+} UhdmSystemVerilogFrontend;
+
 YOSYS_NAMESPACE_END