Sign in
foss-fpga-tools
/
yosys-symbiflow-plugins
/
f20c8f82ef248d20a7c6554bfc3d5c0cac5c2ce1
/
.
/
sdc-plugin
/
tests
/
pll_fbout_phase
/
pll_fbout_phase.input.sdc
blob: 00354d767cfa6ac297cd4cad73c718132504e7f8 [
file
]
create_clock
-
period
10
-
waveform
{
0
5
}
clk