systemverilog-plugin: split line and column in uhdmast_assert_log

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>

systemverilog-plugin/UhdmAst.cc

diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index aa511b4..78b4869 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -729,7 +729,7 @@
         int svcolumn = vpi_get(vpiColumnNo, obj_h);
         std::string obj_type_name = UHDM::VpiTypeName(obj_h);
         const char *obj_name = vpi_get_str(vpiName, obj_h);
-        std::cerr << svfile << ':' << svline << svcolumn << ": note: When processing object of type '" << obj_type_name << '\'';
+        std::cerr << svfile << ':' << svline << ':' << svcolumn << ": note: When processing object of type '" << obj_type_name << '\'';
         if (obj_name && obj_name[0] != '\0') {
             std::cerr << " named '" << obj_name << '\'';
         }